1 errata ? brown-out detector may cause the device to be stuck in reset state pwm not phase correct increased interrupt latency interrupt return fails when stack pointer addresses the external memory writing ubbrh affects both uart0 and uart1 store program memory instruction may fail 6. brown-out detecor may cause the device to be stuck in reset state when the internal brown-out detector is enabled, the device may hang in reset state regardless of the v cc level. problem fix/workaround use external brown-out detector and do not enable internal brown-out detector (leave boden fuse unprogrammed). 5. pwm not phase correct in phase correct pwm mode, a change from ocrx = top to anything less than top does not change the ocx output. this gives a phase error in the following period. problem fix/workaround make sure this issue is not harmful to the application. 4. increased interrupt latency in this device, some instructions are not interruptable, and will cause the interrupt latency to increase. the only practical problem concerns a loop followed by a two- word instruction while waiting for an interrupt. the loop may consist of a branch instruction or an absolute or relative jump back to itself like this: loop: rjmp loop in this case, a dead-lock situation arises. problem fix/workaround in assembly, insert a nop instruction immediately after a loop to itself. the prob- lem will normally be detected during development. in c, the only construct that will give this problem is an empty ?for? loop; ?for(;;)?. use ?while(1)? or ?do{} while (1)? to avoid the problem. 3. interrupt return fails when stack pointer addresses the external memory when stack pointer addresses external memory (sph:spl > $45f), returning from interrupt will fail. the program counter will be updated with a wrong value and thus the program flow will be corrupted. problem fix/workaround address the stack pointer to internal sram or disable interrupts while stack pointer addresses external memory. 8-bit microcontroller with 16k bytes flash atmega161(l) rev. e errata sheet rev. 2473b?avr?05/02
2 atmega161(l) errata 2473b?avr?05/02 2. writing ubbrh affects both uart0 and uart1 writing ubrrhi updates baud rate generator for both uart0 and uart1. the baud rate generator's counter is updated each time either ubrr or ubrrhi are written. since the ubrrhi register is shared by uart0 and uart1, changing the baud rate for one uart will affect the operation of the other uart. problem fix/workaround do not update ubrrhi for one uart when transmitting/receiving data on the other. 1. store program memory instruction may fail at certain frequencies and voltages, the store program memory (spm) instruction may fail. problem fix/workaround avoid using the spm instruction.
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